Work in LFoundry

Working in LFoundry means contributing to innovation in the world and to technological and social growth in Europe. We develop and build day by day what's not there: technologies that allow development in the most important areas for man, automotive, medical imaging, until the internet of things (IoT), paying attention to environmental sustainability and responsibility towards the territory.

Every person in LFoundry is unique in its exclusivity, is embedded in an environment both challenging and collaborative and takes part in making LFoundry a heritage of distinctive knowledge and skills. The osmosis between the individual's contribution and the long-standing semiconductor business experience, makes LFoundry a place to learn quickly, touching silicon, the heart of global innovation.

For this reason, the company takes care to the well-being of each person by providing a satisfactory work-life balance, a broad personalized benefit plan, professional growth opportunities and a wage aligned with the best national standards.

Our sites are located in places far from the stress of the great metropolis and surrounded by nature, which we care to defend and protect supporting many projects of an environmental and social character.

  1. Contribute

    Join the LFoundry team and contribute to the innovative solutions that bring our customers’ ideas to life.

  2. Challenge

    You can help LFoundry to shape innovation on a global scale by working to make our customers’ visions a reality, no matter how big the challenge is.

  3. Transforming

    Work with us and become an essential player, transforming innovation into reality.

Layout Engineer

  • Working area: R&D
  • Facility: Landshut (Germany)
  • Job time: Full time

In your new role you will be responsible to create and verify layouts of analog circuits, blocks and IPs using our LFoundry CMOS technology nodes. 
List of main activities
·Layout and verification of IPs (e.g. IOs, PA, PLL, etc.) test chips and test products 
·Working closely with the design team and other R&D teams regarding layout requirements and implementation  
·Using scripting languages (e.g. SKILL, Python, etc.) to generate layout in a semi-automated way 
·Using version control tools to manage project data

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PDK Development Engineer

  • Working area: R&D
  • Facility: Landshut (Germany)
  • Job time: Full time

In your new role you will be responsible to develop, build and maintain Process Design Kits (PDK) containing necessary information related to a process or technology, which is converted into a design framework, that allow customers to design their products based on the technology offered by LFoundry.  
List of main activities
- Development, maintenance and improvement of LFoundry process design kits (PDK) with support of commonly used EDA tools from vendors like Cadence, Synopsys  
- Preparation of PDK related documentation (e.g. library specifications and data books) 
- Customer communication and support for PDK related questions 
- Integration of internal and external IP’s into the PDK (e.g. IOs) 
- Continues enhancement of existing PDKs with new devices (e.g. LDMOS) 
- Development, maintenance and improvement of PDK-QA flows

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Communication and Recruiting

  • Working area: HR&Corporate Affairs
  • Facility: Avezzano (Italy)
  • Job time: Internship/thesis

The person will support the LFoundry Communication Manager and Recruiting Manager for the following activities: 
- Design and execute a Communication/Training plan on Corporate values ​​in order to create a corporate culture in line with SMIC   
- Support the organization of an international event related to the automotive world that will take place in May in Avezzano
- Support recruiting activities
- Manage internal communication tools: newsletters, company intranet, business TV, mailings, contests. 

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Junior Sales

  • Working area: Sales
  • Facility: Landshut (Germany)
  • Job time: Full time

The Junior Sales is supporting the Sales and Marketing organization in administrating all organization relevant key data collection, preparation and reporting. She/he liaises with the Sales team to ensure the timely delivery of such data. She/he is supporting the SALES& MARKETING team in the account acquisition process documentation and the management of relevant documents and system access and is acting as commercial account contact for institutes and university business. She/he is supporting Key Account and/or Account Managers  in their daily interactions with customers and the Customer Relation Ship team. Act as Account Manager representative and gradually grow into direct account responsibilities

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“Characterization by Raman Spectroscopy of Si wafer implanted with typical CIS Photodiode Implantation processes.”

  • Working area: Physical & FA LAB
  • Facility: Avezzano (Italy)
  • Job time: Internship/thesis

Ion implantation is one of the main techniques for selective doping of semiconductors, as it provides good control on dopant concentration and profile. However, the implantation process damages the crystal structure even leading to total amorphization depending on the type of ion and implantation conditions. Post implantation annealing treatments are necessary to achieve lattice recovery and electric activation of the dopants. Residual defects concentrations after annealing process could still be detrimental for some kind of devices such as CMOS Imager Sensor (CIS).  For these reason one of the main topics for improve CIS performances is to fully characterize the Photodiode implantation processes in terms of residual lattice defect and species activation.  Therefore, Raman scattering emerges as the most useful nondestructive technique to assess lattice recovery with capability of monitoring and characterizing

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SPC Charts Control Limits Characterization

  • Working area: Quality & Controlling
  • Facility: Avezzano (Italy)
  • Job time: internship/thesis

A part of the program of the SPC Control Methodology revamp, we need support to analyze and assess the current Control Limits and Out of Control Alarms setup on SPC charts.

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Adjust Planning Software with new MES System (Eyelit)

  • Working area: ICT
  • Facility: Avezzano (Italy)
  • Job time: internship/thesis

In LFoundry the Planning team use a Micron S/W (PDM) to elaborate fab capacity scenarios in order to evaluate the feasibility to accept new customer demands.
A capacity scenario computation is based on production data coming from MES (Manufacturing Execution Systems)  , like product cycle time, equipment availability, equipment constraints, equipment throughput ,number and mix  of products  in line.
Since Lfoundry is working to replace the current MES  with a new third party software provided by Eyelit , there is the need to reengineering the current planning business 
System to either align it to the new third part s/w and to new business needs.

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Build and Optimize Report data with new MES System

  • Working area: ICT
  • Facility: Avezzano (Italy)
  • Job time: internship/thesis

LFoundry is working to replace Manufacturing Execution Systems with a new third party software provided by Eyelit. We should aggregate business requirements elaborating a new logic for data presentation.

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Study on analytical recovery capability for metal elements from silicon wafer surface by VPD/ICP-MS

  • Working area: R&D
  • Facility: Avezzano (Italy)
  • Job time: internship/thesis

Optical performances of CMOS imagers can be affected by contamination caused by several elements found, even if in extremely low concentration, in semiconductor production environment.
In particular, contamination by noble elements like, for example, Gold or Silver, is extremely critical since these elements have a very low migration rate in the silicon, so they are not easily segregated into the gettering sites. They remain electrically active, and contribute to the so called “hot pixel” defects.
Unfortunately, the noble elements are also very difficult to be effectively detected by VPD/ICP-MS, the technique traditionally and successfully used to detect most of the other elements (like Fe, Cr, Ni, Na, Ca...).
In fact, the chemical mixtures typically used to dissolve noble metals (like Aqua Regia) are very aggressive to the silicon substrate as well, damaging the wafer surface and making recovery by the automated equipment used for this technique (VPD) very difficult and not reliable.
In order to allow the implementation of routine analysis for the full elemental range of interest, alternative chemistries should be defined (through theoretical modeling and analytical test confirmation), capable to assure acceptable analytical recovery for noble elements and the other common elements at same time.

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Spontaneous Application

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